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Boolean relation at the output stage-$Y$ for the following circuit is:
(1) $\overline{A} + \overline{B}$
(2) $A + B$
(3) $A \cdot B$
(4) $\overline{A} \cdot \overline{B}$
OR + NOT $\rightarrow$ NOR Gate. $Y = \overline{A + B} = \overline{A} \cdot \overline{B}$.
BETA
